1. Field of the Invention
This invention relates to data processing systems and more particularly to an apparatus and a method for interrupting and assigning processes to a processor on a priority bias.
2. Description of the Prior Art
In a general purpose computer system and particularly in a multiprogram-multiprocessing computer environment, processes are continuously vying with each other for control of one or more processors. In most prior art digital computers, there are some means of interrupting a program executing on a processor upon demand from an internal or external signal. Generally, the processor of the computer system is interrupted by the occurrence of certain predetermined events which require immediate attention by the processor. Generally in most machines, the interrupt is accomplished by selecting an address of another instruction in another program to execute a new routine, and is generally accomplished totally by software. Before execution of the new program is commenced however, certain registers containing information about the interrupt program must be saved in order to be able to return to the interrupted program at the exact point of interruption. The saving of these registers during the period of interrupt and again the reloading of the registers when the interrupted program is ready to resume is time consuming, but tolerable in a mono processor, mono program environment. However, in a multiprogram-multiprocessor environment, the overhead burden for housekeeping becomes intolerable. Accordingly, operational registers are provided which are unique to each stored program so that a change of control between programs requires no intervention by an executive program to unload or reload the registers. (See U.S. Pat. No. 3,226,694 issued Dec. 28, 1965 to Harry D. Wise, entitled Interrupt System).
As the multiprogramming-multiprocessing environment became more complex, it became necessary to assign priorities to processes so that a process requesting control of a processor could interrupt another process having a lower priority. However, because of the software nature of the interrupt, it often was necessary to interrupt a high priority process to determine whether or not the requesting process did in fact have a higher or lower priority than the executing process. Often it was discovered that the requesting process had a lower priority than the executing process whereupon the executing process continued to run. However, during the time that was consumed to determine which one of the two, the executing or requesting process had higher priority, a higher priority process had in fact been interrupted by a lower priority process, merely to make the determination.
What is needed, therefore, is a priority interrupt mechanism to monitor and determine if an executing process has higher or lower priority than a requesting process, prior to the actual interrupt of the executing process and a dispatching mechanism to address and provide data to the highest priority process upon and interrupt.